| 摘要 |
PURPOSE:To send data for A/D.D/A conversion with high reliability by taking a majority decision logic even on the occurrence of a bit error on a transmission line. CONSTITUTION:The system is provided with a data transmitter 1 comprising an A/D converter section 1A converting an analog signal into a digital signal in a prescribed bit number, a weight addition section 1B adding an odd number of weight bits to high-order bits of the signal, and a P/S conversion section 1C converting a parallel digital signal into a serial digital signal and sending the converted signal, with a data receiver 2 comprising an S/P conversion section 2D receiving the serial digital signal and converting it into a parallel digital signal, a majority decision logic section 2E applying majority decision logic discrimination to the odd number of weight bits added to the high-order bits of the digital signal and restoring the result to a prescribed bit number, and a D/A converter section 2F converting the parallel digital signal restored to the prescribed bit number into an analog signal, and with a transmission line 3. |
