发明名称 Method of establishing a master & minus; host in modules connecting in parallel
摘要 This invention relates to a method of establishing a master unit in a multi-unit parallel system. Each module with a respective number is connected through a bus, and has a different host-identifying pulse width Ts and a host-releasing pulse width Tw. According to the respective numbers, each module sends its host-identifying pulse to the bus and receives the feedback pulse, and then establishes a master unit among all of modules after comparing the feedback pulse width Tr and the host-releasing pulse width Tw. This method effectively realizes a decentralized controlling strategy for phase synchronization in a parallel inverter system and ensures that only one master unit exists in the parallel system. The connection of the multi-string parallel signal bus is simple, and can be connected in circle to provide the redundancy. Compared with the prior art, it is much simple in structure and flexible in configuration and adjustment, and has more reliability and real-time capability.
申请公布号 US2005041445(A1) 申请公布日期 2005.02.24
申请号 US20040500452 申请日期 2004.06.29
申请人 ZHOU DANGSHENG 发明人 ZHOU DANGSHENG
分类号 H02J1/10;H02M7/48;H02M7/493;(IPC1-7):H02M1/00 主分类号 H02J1/10
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