| 摘要 |
A bus for integrated circuits or embedded cores for serial access to circuits (e.g., for test, emulation, debug, trace operations) with limited pins. An integrated circuit (500) includes an IEEE 1149.1 Tap domain region (522) with Tap domains (502 - 508) having JTAG circuits (510) coupled to an addressable Tap domain selection circuit (514) via buses (512). The selection circuit is coupled to a TDI input (520), a TCK input (520), a TMS input (518), and a TDO output (520). |
