发明名称 Method of automating place and route corrections for an integrated circuit design from physical design validation
摘要 A method and computer program product for automatically correcting errors in an integrated circuit design includes steps of: (a) performing a physical design validation of an integrated circuit design to verify compliance with a set of design rules; (b) generating a results database of design rule violations detected by the physical design validation; (c) identifying locations in the integrated circuit design from the results database for making design corrections according to a post-processing rule deck so that the locations of the design corrections comply with the set of design rules; and (d) implementing the design corrections in the integrated circuit design.
申请公布号 US7302654(B2) 申请公布日期 2007.11.27
申请号 US20040977386 申请日期 2004.10.29
申请人 LSI CORPORATION 发明人 LAKSHMANAN VISWANATHAN;JOSEPHIDES MICHAEL;BLINNE RICHARD D.
分类号 G06F17/50 主分类号 G06F17/50
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