发明名称 Methods of forming field effect transistors using a gate cut process following final gate formation
摘要 Disclosed are field effect transistor (FET) formation methods using a final gate cut process and the resulting structures. One method forms an elongated gate across first and second semiconductor bodies for first and second FETs, respectively. An opening is formed in a portion of the elongated gate between the semiconductor bodies, cutting at least the gate conductor layer. The opening is filled with an isolation layer, thereby forming an isolation region that segments the elongated gate into first and second gates for the first and second FETs, respectively. Another method forms at least three gates across an elongated semiconductor body. An isolation region is formed that extends, not only through a portion of a center one of the gates, but also through a corresponding portion of the elongated semiconductor body adjacent to that gate, thereby segmenting the elongated semiconductor body into discrete semiconductor bodies for first and second FETs.
申请公布号 US9373641(B2) 申请公布日期 2016.06.21
申请号 US201414462631 申请日期 2014.08.19
申请人 International Business Machines Corporation 发明人 Anderson Brent A.;Nowak Edward J.
分类号 H01L27/12;H01L21/84;H01L21/762;H01L21/8234;H01L29/66;H01L21/3105;H01L29/51;H01L27/088;H01L29/06;H01L21/265;H01L29/49 主分类号 H01L27/12
代理机构 Gibb & Riley, LLC 代理人 Gibb & Riley, LLC ;Meyers, Esq. Steven J.
主权项 1. A method of forming a semiconductor structure, said method comprising: forming multiple semiconductor bodies comprising at least a first semiconductor body for a first field effect transistor and a second semiconductor body for a second field effect transistor parallel to said first semiconductor body; forming an elongated gate that traverses said multiple semiconductor bodies and that is laterally surrounded by a gate sidewall spacer, said elongated gate comprising a gate conductor layer; and after said forming of said elongated gate, forming an isolation region in a portion of said elongated gate between said first semiconductor body and said second semiconductor body, said isolation region comprising: an opening that extends vertically into said portion of said elongated gate and that cuts at least said gate conductor layer into discrete segments, said opening having a width that is less than a distance between said first semiconductor body and said second semiconductor body and a length that traverses said gate conductor layer; and an isolation layer within said opening positioned laterally between and immediately adjacent to said discrete segments, said isolation region segmenting said elongated gate into a first gate for said first field effect transistor and a second gate for said second field effect transistor and electrically isolating said first gate from said second gate.
地址 Armonk NY US