Charge pump circuit, integrated circuit, electronic device and method therefor

摘要

A charge pump circuit for generating a negative voltage has: a clock generator arranged to output at least one clock signal; a switched capacitor voltage inverter circuit including capacitive elements wherein the switched capacitor voltage inverter circuit receives the at least one clock signal and generates a negative voltage therefrom. The charge pump circuit further has a regulation control loop providing a feedback path from an output of the switched capacitor voltage inverter circuit to a supply input of the switched capacitor voltage inverter circuit, and an output arranged to output a generated negative voltage. The feedback path has an operational amplifier configured to generate a maximum charging supply voltage from a fed back level-shifted negative voltage and apply the maximum charging supply voltage to the input supply of the switched capacitor voltage inverter to charge at least one of the capacitive elements during a loop start up.

主权项

1. A charge pump circuit for generating a negative voltage comprising:
a clock generator configured to generate and output at least one clock signal; a switched capacitor voltage inverter circuit comprising a plurality of capacitive elements wherein the switched capacitor voltage inverter circuit is arranged to receive the at least one clock signal and generate a negative voltage therefrom; a feedback path from an output of the switched capacitor voltage inverter circuit to feed back a representation of the negative voltage to the clock generator, wherein the clock generator uses the representation of the negative voltage in a generation of the at least one clock signal that traverses between the negative voltage and a voltage potential; and an output arranged to output a generated negative voltage.