发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
<p>PURPOSE:To provide the semiconductor integrated circuit with which the generation of a malfunction by noise, etc., is obviated by controlling the voltage to be impressed to the gate electrode of a transfer gate connected to a precharge circuit by an N-channel FET concerning the semiconductor integrated circuit for which the precharge circuit by the N-channel FET is used. CONSTITUTION:The semiconductor integrated circuit in which a voltage operating line 37 connected to the precharge circuit 30 consisting of the N-channel FET arrive at an output circuit section 32 via the transfer gate 33 is constituted by impressing the output voltage of a voltage dropping circuit 36 inserted between the gate terminal of the transfer gate 33 and a voltage source 35 to this terminal.</p> |
申请公布号 |
JPH04248189(A) |
申请公布日期 |
1992.09.03 |
申请号 |
JP19910024058 |
申请日期 |
1991.01.24 |
申请人 |
FUJITSU LTD |
发明人 |
KANEDA RYOHEI;NAITO MUTSUHIRO |
分类号 |
G11C11/41;G11C11/413;G11C16/06;H03K17/687;H03K19/003;H03K19/177 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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