发明名称 FUSE PROGRAMMABLE FOR PREVENTING A SEMICONDUCTOR DEVICE FROM OPERATING
摘要 A clock frequency limiting circuit is disclosed. The clock frequency limiting circuit allows a semiconductor device to be fabricated, packaged and tested before the maximum clock frequency is set. The maximum clock frequency is set by burning a bank of on-chip fuses (250). The clock frequency limiting circuit counts clock cycles (120) of an applied clock signal for a predetermined amount of time. A comparator (130) compares the maximum clock frequency in the fuse bank (250) and the counted clock cycles (120). A violation "kill" signal (155) is asserted if the counted clock cycles (120) exceed the set maximum clock frequency.
申请公布号 WO9734157(A1) 申请公布日期 1997.09.18
申请号 WO1997US03624 申请日期 1997.03.07
申请人 INTEL CORPORATION;GAVISH, DAN 发明人 GAVISH, DAN
分类号 G01R31/30;G06F11/00;G06F11/32;(IPC1-7):G01R23/02;H01H37/76 主分类号 G01R31/30
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