发明名称 CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a technique capable of forming a small diameter via hole into an insulating layer including an inorganic filler in manufacturing a circuit board, the via hole having a good via shape and being small in an internal smear amount.SOLUTION: In a circuit board including an insulating layer in which a via hole having an aperture diameter of 15 μm or less is formed, the arithmetic average roughness (Ra) of the surface of an insulating layer is 150 nm or less, an insulating layer contains inorganic fillers, and the average number of inorganic fillers with a grain size of 3 μm or more contained in a region with a width of 15 μm is 1.0 or less in a cross section of an insulating layer in a direction vertical to the surface of the insulating layer.SELECTED DRAWING: None
申请公布号 JP2016092172(A) 申请公布日期 2016.05.23
申请号 JP20140224164 申请日期 2014.11.04
申请人 AJINOMOTO CO INC 发明人 NISHIMURA YOSHIO;NAKAMURA SHIGEO
分类号 H05K3/46;C08K9/06;C08L63/00;H01L23/12;H05K1/02;H05K1/03;H05K3/00 主分类号 H05K3/46
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