Vertical random access memory with selectors

摘要

Devices and methods for manufacturing a device are presented. The device includes a substrate and a vertical structure disposed over the substrate. The vertical structure includes one or more memory cell stacks with a dielectric layer between every two adjacent cell stacks. Each of the one or more cell stacks includes first and second first type conductors on first and second sides of the cell stack, respectively; first and second electrodes, the first electrode adjacent the first first type conductor, the second electrode adjacent the second first type conductor; and first and second memory elements, the first memory element disposed between the first first type conductor and the first electrode, the second memory element disposed between the second first type conductor and the second electrode. The device also includes a selector element disposed over the substrate and vertically traversing through a middle portion of the vertical structure. The selector element includes respective first and second selector diodes for the first and second memory elements of each of the one or more cell stacks.

主权项

1. A method of manufacturing a device comprising:
providing a substrate; forming an inter-layer dielectric (ILD) layer over the substrate; forming, on the ILD layer, a vertical structure having a plurality of memory with one or more selectors, the vertical structure is made of a plurality of conductive stacks, wherein a conductive stack of the plurality of conductive stacks is formed by
(a) forming first and second first type conductors on first and second sides of the conductive stack,(b) providing a first memory element adjacent the first first type conductor and a second memory element adjacent the second first type conductor,(c) forming first and second electrodes with the first electrode adjacent the first memory element and the second electrode adjacent the second memory element,(d) forming a conductor layer of a first polarity type between the first and second first type conductors, and(e) forming a dielectric layer over the first and second first type conductors, the first and second electrodes, and the conductor layer of the first polarity type; forming and stacking a successive conductive stack by repeating steps (a)-(e) over a preceding conductive stack formed by steps (a)-(e) to form the vertical structure on the ILD layer; etching an opening through a middle portion of the plurality of conductive stacks which form the vertical structure and the ILD layer after forming the plurality of conductive stacks; and filling the opening with a conductor layer.