发明名称 Three dimensional NAND device with semiconductor, metal or silicide floating gates and method of making thereof
摘要 A method of making a monolithic three dimensional NAND string includes forming a stack of alternating layers of a first material and a second material, etching the stack to form a front side opening in the stack, selectively forming a plurality of discrete semiconductor, metal or silicide charge storage regions on portions of the second material layers exposed in the front side opening, forming a tunnel dielectric layer and semiconductor channel layer in the front side opening, etching the stack to form a back side opening in the stack, removing at least a portion of the second material layers through the back side opening to form back side recesses between the first material layers, forming a blocking dielectric in the back side recesses through the back side opening, and forming control gates over the blocking dielectric in the back side recesses through the back side opening.
申请公布号 US9397093(B2) 申请公布日期 2016.07.19
申请号 US201313762988 申请日期 2013.02.08
申请人 SANDISK TECHNOLOGIES INC. 发明人 Makala Raghuveer S.;Alsmeier Johann
分类号 H01L21/336;H01L27/088;H01L29/66;H01L21/8239;H01L21/28;H01L21/822;H01L29/788;H01L27/115 主分类号 H01L21/336
代理机构 The Marbury Law Group PLLC 代理人 The Marbury Law Group PLLC
主权项 1. A method of making a monolithic three dimensional NAND string, comprising: forming a stack of alternating layers of a first material and a second material over a substrate, wherein the first material comprises an electrically insulating material and wherein the second material comprises a sacrificial material; etching the stack to form a front side opening in the stack; selectively forming a plurality of discrete semiconductor, metal or silicide charge storage regions on portions of the second material layers exposed in the front side opening; forming a tunnel dielectric layer over the charge storage regions in the front side opening; forming a semiconductor channel layer over the tunnel dielectric layer in the front side opening; etching the stack to form a back side opening in the stack; removing at least a portion of the second material layers through the back side opening to form back side recesses between the first material layers; forming a blocking dielectric in the back side recesses through the back side opening; and forming control gates over the blocking dielectric in the back side recesses through the back side opening, wherein the step of selectively forming a plurality of discrete semiconductor, metal or silicide charge storage regions comprises selectively growing metal or silicide charge storage regions on the portions of the second material layers exposed in the front side opening.
地址 Plano TX US