Memory frame architecture for instruction fetches in simulation

摘要

A simulation technique that handles accesses to a frame of instruction memory by inserting a command object between a frame proxy and a memory frame provides improved throughput in simulation environments. The instruction frame, if present, processes the access to the frame. If an instruction frame is not present for the accessed frame, the memory frame handles the request directly. The instruction frame caches fetched and decoded instructions and may be inserted at the first access to a corresponding instruction memory frame. The instruction frame can track write accesses to instruction memory so that changes to the instruction memory can be reflected in the state of the instruction frame. Additional check frames may be chained between the interface and the memory frame to handle breakpoints, instruction memory watches or other access checks on the instruction memory frame.

主权项

1. A method of processing simulated accesses to instruction memory by a processor being simulated by a simulation program executing within a computer system, the method comprising:
receiving, from the processor, a next instruction access request to access an instruction memory location within a frame of the memory of the computer system at a proxy frame corresponding to the instruction memory frame, wherein the instruction memory frame represents a tail of a linked list accessed via the proxy frame; if an instruction frame has been inserted in the linked list ahead of the memory frame, processing the access request by the command, wherein the instruction frame provides a buffered decoded instruction to the simulation program; and if the instruction frame has not been inserted ahead of the memory frame, processing the access request by the memory frame directly.