发明名称 COPPER GATE BY DUAL DAMASCENE METHOD AND INTERCONNECTION THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a low-cost manufacturing technique of a metal gate wherein the metal gate and the interconnection thereof of a semiconductor device are formed in a single processing. SOLUTION: The manufacturing method of a semiconductor device includes a process for preparing its silicon substrate having thereon insulation regions, a process for forming an insulation layer and depositing a first barrier metal layer in its gate region of its active region, a process for depositing a gate place holder layer on the first barrier metal layer, a process for forming its gate stack by etching the gate place holder layer and the first barrier metal layer, a process for constructing sidewalls on the peripheries of its gate stack, a process for forming its source/drain regions in its active region, a process for so etching an oxide layer deposited on the structure of its source/drain regions, as to form a dual damascene trench extending to the level of the gate place holder layer and form vias for its source/ drain regions, a process for depositing a second barrier metal layer in the dual damascene trench and the vias, a process for removing the gate place holder layer, a process for depositing a copper in the dual damascene trench and in the vias, and a process for so removing all the excess portions of the copper and the second barrier metal layer that their levels coincide with the level of the finally deposited oxide layer.
申请公布号 JP2002329866(A) 申请公布日期 2002.11.15
申请号 JP20020079751 申请日期 2002.03.20
申请人 SHARP CORP 发明人 SHIEN TEN SUU;EVANS DAVID RUSSELL
分类号 H01L29/43;H01L21/336;H01L21/768;H01L29/423;H01L29/49;H01L29/78;(IPC1-7):H01L29/78 主分类号 H01L29/43
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