发明名称 MANUFACTURING METHOD OF BOARD FOR SEMICONDUCTOR PACKAGE
摘要 PROBLEM TO BE SOLVED: To provide a manufacturing method of a printed wiring board for a semiconductor package solving problems of contamination of a liquid of an electrolytic nickel/gold plating bath due to a palladium catalyst adhesion process before electroless copper plating, insulation reliability degradation between solder ball pads and the like, and having a pad subjected to electrolytic nickel/gold plating in a part of a semiconductor mounting surface without using a bus line. SOLUTION: In relation to a circuit board of which the front and back sides are electrically connected through copper-plated vias, in this manufacturing method of a board for a semiconductor package, a surface roughening process of solder resist 8, a palladium removal process of a copper exposure part on a solder ball mounting surface, and a surface treatment process comprises an organic rustproofing process, electroless gold plating, electroless tin plating and a solder process. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009135362(A) 申请公布日期 2009.06.18
申请号 JP20070312018 申请日期 2007.12.03
申请人 NIPPON CIRCUIT KOGYO KK;MITSUBISHI GAS CHEM CO INC 发明人 NAKAMURA KEITARO;KAWAI RYOJI;OKAMOTO HIDENORI;KANEHARA HIDENORI
分类号 H01L23/12 主分类号 H01L23/12
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