发明名称 |
Memory device and method |
摘要 |
A memory device and a method for compensating for a load current in the memory device. The memory device includes a plurality of I/O buffers where each I/O buffer includes an I/O write-buffer driver circuit. The I/O write-buffer driver circuit is coupled to a load current compensation circuit. Although each I/O buffer includes an I/O write-buffer circuit, a single load current compensation circuit may be coupled to several I/O write-buffer driver circuits. The load current compensation circuit generates a load compensation current for each I/O buffer circuit that is not being programmed. The load compensation current increases the load current so that a drain-side programming voltage (VPROG) drives a substantially constant load current, wherein the drain-side programming voltage is substantially independent of the number of bits being programmed.
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申请公布号 |
US6980473(B1) |
申请公布日期 |
2005.12.27 |
申请号 |
US20030677031 |
申请日期 |
2003.10.01 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
BAUTISTA, JR. EDWARD V.;CHEAH KEN CHEONG;HO CHI-MUN |
分类号 |
G11C16/04;G11C16/12;G11C16/30;G11C16/34;(IPC1-7):G11C16/04 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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