发明名称 Interpolation circuitry and methods
摘要 Circuitry for interpolating a value based on a first plurality of samples from within a larger second plurality of samples includes storage for the second plurality of samples, including a plurality of sample memories corresponding in number to the first plurality of samples. Adjacent samples in the sample memories correspond to samples in the second plurality of samples that are separated by other samples numbering one less than that number. A first sample address into a first one of the sample memories is derived by dividing a floor of an index by the number. Respective circuitry for each respective other one of the sample memories derives a respective other sample address from the first sample address based on a remainder of dividing the floor of the index by the number. Shifting circuitry outputs selected samples in a second order under control of a value determined by the remainder.
申请公布号 US9484901(B1) 申请公布日期 2016.11.01
申请号 US201514595470 申请日期 2015.01.13
申请人 Altera Corporation 发明人 Pritsker Dan;Cheung Colman C.
分类号 H03H11/16;H03K5/135 主分类号 H03H11/16
代理机构 Fletcher Yoder, P.C. 代理人 Fletcher Yoder, P.C.
主权项 1. Interpolation circuitry for interpolating a value based on a first plurality of samples from within a larger second plurality of samples, said interpolation circuitry comprising: storage for said second plurality of samples, including a plurality of sample memories corresponding in number to said first plurality of samples, wherein samples in said second plurality of samples are distributed uniformly among said plurality for sample memories, each pair of adjacent samples in one of said sample memories corresponding to samples in said second plurality of samples separated by other samples numbering one less than said number; circuitry that receives an input index corresponding to said value and derives a first sample address into a first one of said sample memories by dividing a floor of said index by said number; respective circuitry for each respective other one of said sample memories that derives a respective other sample address from said first sample address based on a remainder of dividing said floor of said index by said number; and shifting circuitry that receives as inputs, in a first order, samples selected by said first sample address and each respective other sample address, and outputs said selected samples in a second order under control of a value determined by said remainder.
地址 San Jose CA US