发明名称 Vector compare instructions for sliding window encoding
摘要 A processor is described having an instruction execution pipeline having a functional unit to execute an instruction that compares vector elements against an input value. Each of the vector elements and the input value have a first respective section identifying a location within data and a second respective section having a byte sequence of the data. The functional unit has comparison circuitry to compare respective byte sequences of the input vector elements against the input value's byte sequence to identify a number of matching bytes for each comparison. The functional unit also has difference circuitry to determine respective distances between the input vector's elements' byte sequences and the input value's byte sequence within the data.
申请公布号 US9489199(B2) 申请公布日期 2016.11.08
申请号 US201213730732 申请日期 2012.12.28
申请人 Intel Corporation 发明人 Gopal Vinodh;Guilford James D.;Wolrich Gilbert M.
分类号 G06F9/30;G06F7/02;G06K9/62;H03M7/30 主分类号 G06F9/30
代理机构 Nicholson De Vos Webster & Elliott, LLP 代理人 Nicholson De Vos Webster & Elliott, LLP
主权项 1. A processor comprising: an instruction execution pipeline having a functional unit to execute an instruction that compares vector elements of a vector against an input value, each of the vector elements and the input value having a first respective section to store a location of a byte sequence within data and a second respective section to store the byte sequence of the data, the functional unit having: comparison circuitry to compare respective byte sequences of the vector elements against the input value's byte sequence to identify a number of matching bytes for each comparison from the second respective sections; and difference circuitry to determine respective distances between said vector elements' byte sequences and said input value's byte sequence within said data from the first respective sections.
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