| 摘要 |
An offset cancellation circuit(1) for an analog switch(10) is provided which substantially reduces the offset voltage induced by the analog switch circuit. The circuit(1) comprising a second P-channel transistor(2) and a third N-channel transistor(4) connected to each other in series, the drains of the second P-channel transistor and the third N-channel transistor being connected to the output terminal; a second N-channel transistor(3) and a third P-channel transistor(5) connected to each other in series, the drains of the second N-channel transistor and the third P-channel transistor being connected to the output terminal; the gate of the second P-channel transistor is connected to the gate of the N-channel transistor; and the gate of the second N-channel transistor is connected to the gate of the P-channel transistor. |
