发明名称 |
Circuit and method for detecting segment limit errors for code fetches |
摘要 |
A segment limit check circuit performs limit checks on fetch addresses generated by a CPU. The circuit and method for performing the fetch limit check are simplified over the prior art by effectively moving the fetch limit check to linear address space. For a microprocessor that uses physical addresses of 32-bits and performs fetches as 16-byte aligned accesses, the circuit of the present invention generates a 33-bit linear address and a 33-bit upper limit value. A comparator compares the upper 29 bits of the linear address with the upper 29-bits of the upper limit value. If a match occurs, the circuit decodes the 4 low-order bits of the upper limit value to determine which of the 16 instruction bytes (if any) fall outside the segment limit.
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申请公布号 |
US5564030(A) |
申请公布日期 |
1996.10.08 |
申请号 |
US19940193289 |
申请日期 |
1994.02.08 |
申请人 |
MERIDIAN SEMICONDUCTOR, INC. |
发明人 |
WHITTED, III, GRAHAM B.;CHANG, HSIAO-SHIH;KANE, JAMES A. |
分类号 |
G06F9/30;G06F9/355;G06F9/38;G06F12/02;G06F12/14;(IPC1-7):G06F12/00 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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