发明名称 Semiconductor integrated circuit having layout in which buffers or protection circuits are arranged in concentrated manner
摘要 Buffers are arranged in a concentrated manner in a region distant from pads. The region refers to a region in a main region of a semiconductor integrated circuit, except for a central processing unit, a non-volatile memory and a volatile memory. As the buffer requiring a large area is not provided around the pad, a pitch between the pads or a pitch between the pad and an internal circuit (such as the central processing unit) can be made smaller and hence a chip size can be reduced. Therefore, a semiconductor integrated circuit capable of achieving a reduced chip size can be provided.
申请公布号 US7358548(B2) 申请公布日期 2008.04.15
申请号 US20060328194 申请日期 2006.01.10
申请人 RENESAS TECHNOLOGY CORP. 发明人 NAKAMURA TADASHI;SAKAKIBARA KIYOHIKO;TAKIKAWA YUTAKA
分类号 H01L29/00;H01L27/10 主分类号 H01L29/00
代理机构 代理人
主权项
地址