发明名称 CLASS D AMPLIFIER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a circuit for cancelling an output offset voltage due to an offset voltage occurring at an input of a fully differential operational amplifier at start-up and at shut-down, while realizing down-sizing of its chip size.SOLUTION: A class D amplifier performs output offset voltage cancellation by adding a voltage on charging/discharging a capacitor C2p from a positive side variable current source 16p to a positive side input signal 5p as a positive side adjustment signal, adding a voltage on charging/discharging a capacitor C2n from a negative side variable current source 16n to a negative side input signal 5n as a negative side adjustment signal, so as to a phase difference between a positive side PWM modulation signal V3p and a negative side PWM modulation signal V3n becomes zero.SELECTED DRAWING: Figure 1
申请公布号 JP2016127483(A) 申请公布日期 2016.07.11
申请号 JP20150000896 申请日期 2015.01.06
申请人 NEW JAPAN RADIO CO LTD 发明人 ENDO YASUYUKI
分类号 H03F3/217;H03F3/34 主分类号 H03F3/217
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