| 摘要 |
<p>PURPOSE:To eliminate the need for a high frequency clock generator by generat ing a pulse signal to fetch each bit data based on an edge of a start point for each bit period of input serial data subject to pulse width modulation. CONSTITUTION:An edge detector 28 detects a start point edge for each bit period to output an edge detection signal and a pulse generator 30 comprising a monostable multivibrator replies with the edge detection signal to generate a pulse signal having a width within a pulse width representing data or 1 or 0. The pulse signal is fed to a clock input terminal of a shift register 26 and serial data are fetched by the shift register 26 in a timing of a trailing edge of the pulse signal. Then all word bits appearing at an output terminal of the shift register 26 are latched by a data latch circuit 32 and outputted. That is, a proper pulse signal to fetch data 1,0 subject to pulse width modulation is generated based on a start point edge for each bit period.</p> |
