发明名称 MEMORY BYPASS METHOD AND SYSTEM IN A COMPUTING ELEMENT IN A COMPUTATIONAL ARRAY
摘要 <p>A computing element (200) in a computational array includes a memory bypass system which performs in a single clock cycle a calculation that requires the result of a previous calculation performed in a previous clock cycle. The computing element has a computational unit (210) which performs calculations and a result memory (240) which stores the results of the calculations. The memory bypass method and system bypasses the result memory (240) when it determines that the result of a calculation is needed as an input to the next calculation to be performed, and provides the result of the calculation directly to the computational unit (210) to perform the next calculation. Otherwise, when the result is not needed as the input in the next calculation, the memory bypass method and system reads the input for the next calculation from the result memory (240).</p>
申请公布号 WO1997024673(A1) 申请公布日期 1997.07.10
申请号 US1996017108 申请日期 1996.10.23
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址
您可能感兴趣的专利