| 摘要 |
PROBLEM TO BE SOLVED: To provide a PN code (pseudo-noise code) generating circuit where an initial value setting is not required. SOLUTION: One of data of the frontmost stage D1 of an n-number stage shift register 50 or data of the third stage D3 is selected by a selector circuit 1, and an exclusive OR operation is executed in an adder 2 concerning the selected data and data of a last stage Dn. The result is inputted to the frontmost stage D1, and a PN code word is outputted from the last stage Dn. The result of the exclusive OR operation is also inputted to a PN code cycle detecting circuit 3, and a PN code cycle signal 14 is outputted to FF(flip-flop) 4, when '1' is continuously inputted with n-bit. FF 4 outputs a selecting signal 15' to the selector circuit 1 with this timing and the selector circuit 1 selects input data. Two PN code lengths are set to 2<n> -1. The initial value setting circuit is not required, since initial synchronization is obtained by continuous '1' and also the two PN code lengths are equal. |
