Ascertaining command completion in flash memories

摘要

Ascertaining command completion in flash memories is disclosed. An exemplary aspect includes eliminating the software lock and the outstanding requests variable and replacing them with a transfer request completion register. The transfer request completion register may be mapped to the universal flash storage (UFS) Transfer Protocol (UTP) Transfer Request List (UTRL) slots. The controller of the host—a hardware component—may set the bit in the transfer request completion register on transfer request completion at the same time the doorbell register is cleared. After this bit has been read, the bit in the transfer request completion register is cleared.

主权项

1. A universal flash storage (UFS) system comprising:
a doorbell register having a number of bits corresponding to a UFS transfer protocol (UTP) Transfer Request List (UTRL); a completion notification register having a same number of bits; and a control system operatively coupled to the doorbell register and the completion notification register and configured to:
set a doorbell bit in the doorbell register for a send request start;set a completion bit in the completion notification register on transfer request completion; andclear the doorbell bit on transfer request completion.