发明名称 MITIGATING A PHASE ANOMALY IN AN ANALOGUE-TO-DIGITAL CONVERTER OUTPUT SIGNAL
摘要 A method and apparatus for mitigating a phase anomaly in an analogue-to-digital converter (ADC) output signal is disclosed. A plurality of codewords output by the ADC are received and information about an estimated level of interference between an output of the ADC and an input of the ADC due to the codeword is obtained for each codeword based on the logic values of bits in the codeword. In-phase (I) and quadrature (Q) corrections are obtained based on the information about the estimated level of interference, and applied to I and Q values obtained from the ADC output signal.
申请公布号 US2016248461(A1) 申请公布日期 2016.08.25
申请号 US201615009789 申请日期 2016.01.28
申请人 AIRBUS DEFENCE & SPACE LIMITED 发明人 Farrugia Lewis;Gibson Mark;Pearson Ryan
分类号 H04B1/10;H03M1/08;H03M1/12 主分类号 H04B1/10
代理机构 代理人
主权项 1. A method of mitigating a phase anomaly in an analogue-to-digital converter ADC output signal, the method comprising: receiving a plurality of codewords output by the ADC; obtaining, for each one of the plurality of codewords, information about an estimated level of interference between an output of the ADC and an input of the ADC due to the codeword based on the logic values of bits in the codeword; obtaining in-phase I and quadrature Q corrections based on the obtained information; and applying the I and Q corrections to I and Q values obtained from the ADC output signal.
地址 Stevenage GB