| 摘要 |
A semiconductor substrate (1) includes a region (AR3) between a region (AR1) and a region (AR2). A control gate electrode (CG) is formed on the upper surface (TS1) of the region (AR1) and a memory gate electrode (MG) is formed on the upper surface (TS2) of the region (AR2). The upper surface (TS2) is lower than the upper surface (TS1), and the region (AR3) has a connection surface (TS3) connecting the upper surface (TS1) and the upper surface (TS2) to each other. The upper-surface-(TS2)-side end part (EP1) of the connection surface (TS3) is disposed near the memory electrode (MG) relative to the upper-surface-(TS1)-side end part (EP2) of the connection surface (TS3), and is disposed lower than the end part (EP2). |
