发明名称 Timers and methods thereof for computing devices
摘要 Method and system for a device having a processor module for maintaining a connection with another device are provided. The device includes a timer module having a plurality of timers, where the resolution for each timer is maintained by one or more processor modules; and a timer state module that stores an indicator value for indicating a timer state. A timer is assigned to the connection and the processor module manages the resolution of the timer. The processor module sends a request to the timer module for arming the timer and the timer module sets the timer state as active in a first storage location maintained by the timer state module; and responds to the processor module after the timer is activated. The processor module uses the information in the response for requesting a disarm operation.
申请公布号 US9465406(B1) 申请公布日期 2016.10.11
申请号 US201314067815 申请日期 2013.10.30
申请人 QLOGIC, Corporation 发明人 Sarcar Kanoj;Campbell Ralph B.;Pearson Daniel R.
分类号 G06F1/14;G06F1/04;G06F1/00;H04L1/18;H04L29/06 主分类号 G06F1/14
代理机构 Klein, O'Neill & Singh, LLP 代理人 Klein, O'Neill & Singh, LLP
主权项 1. A machine implemented method, comprising: assigning a timer from a plurality of timers maintained by a timer state module to a connection maintained by a processor module from among a plurality of processor modules of a device; initializing a counter module and compare module included on the processor module and maintained by the processor module for a resolution for the timer; wherein the plurality of processor modules include and maintain associated counter modules and compare modules for different connections for tracking time based on different resolutions; initializing the timer state module for storing an indicator value indicating a timer state for the timer; sending a request with an input-timer identifier for arming the timer, the request sent by the processor module to a timer module, the timer module including the plurality of timers and the timer state module; setting the timer state for the timer as active in a first storage location of the timer state module; responding to the processor module by the timer module after the timer is activated with an armed-timer identifier indicating that the timer is active, where the armed-timer identifier is based on the input-timer identifier and encoding for the first storage location; storing the armed-timer identifier by the processor module; using the armed-timer identifier by the processor module for requesting a disarm operation; and decoding the armed-timer identifier by the timer module to determine the first storage location for disarming the timer.
地址 Aliso Viejo CA US