Bidirectional scanning GOA circuit

摘要

A GOA circuit for use in LCD applications is disclosed, and the GOA circuit includes multiple cascaded GOA units, each of which includes a pull-up control circuit, a pull-up circuit, a pull down circuit, a pull-down holding circuit, a reset circuit, and a bootstrap capacitor. By using the GOA circuit, scanning directions of the LCD display panel are controlled by introducing scanning control signals to the pull-up control circuit for determining to output gate signals of the GOA circuit in sequence of up-to-down stages or in sequence of down-to-up stages. Furthermore, a novel scheme of three-segment voltage division achieves the optimization and the stability of the GOA circuit.

主权项

1. A bidirectional scanning GOA circuit for use in an LCD device including multiple cascaded GOA units, each of which generates one or more scanning signals outputted to the LCD device, the GOA unit comprising:
a pull-up control circuit including a forward scanning control signal input port configured to input a scanning control signal that controls the circuit to output in sequence of up-to-down stages, a backward scanning control signal input port configured to input a scanning control signal that controls the circuit to output in sequence of down-to-up stages, a plurality of gate signal input ports configured to receive a gate signal of a preceding-stage GOA unit and a gate signal of a succeeding-stage GOA unit, and an output port configured to output a pull-up control signal; a pull-up circuit including an input port connected with a key node Q(N), configured to receive the pull-up control signal, a clock signal input port configured to receive a clock pulse signal and a gate signal output port of the current stage GOA unit, wherein the pull-up control signal is formed in accordance with the scanning control signals of the pull-up control circuit and the gate signal transmitted from either the preceding-stage GOA unit or the succeeding-stage GOA unit, upon forward scanning, the pull-up circuit is activated to charge the key node Q(N) when the gate signal transmitted from the preceding-stage GOA unit configured in a HIGH electric potential, and upon backward scanning, the pull-up circuit is activated to charge the key node Q(N) when the gate signal of the succeeding-stage GOA unit configured in a HIGH electric potential; a bootstrap circuit including a bootstrap capacitor configured to secondarily lift a voltage of the key node Q(N); a pull down circuit including a gate signal input port configured to receive the gate signal transmitted from the succeeding-stage GOA unit, a low voltage input port configured to input a DC low voltage, and an output port connected with the key node Q(N), and discharge the key node Q(N) when the gate signal input port receives the gate signal transmitted from the succeeding-stage GOA unit; a pull-down holding circuit including a plurality of first clock signal input ports configured to input the first clock signals, a plurality of second clock signal input ports configured to input the second clock signals, and a plurality of connection points configured to connect the key node Q(N) with the signal output port of the GOA unit to sustain an electric potential of the key node Q(N) and the output signal of the GOA unit in LOW electric potentials, under the control of the first clock signal and the second clock signal, until the key node Q(N) is charged next time, wherein the signal output port of the GOA unit is coupled to a corresponding gate line; and a reset circuit configured for resetting the electric potential of the key node Q(N) to zero.