发明名称 |
Instruction dispatch queue for improved instruction cache to queue timing |
摘要 |
A circular dispatch queue is used to implement an instruction queue, in a microprocessor, in order to reduce the delay associated with the critical timing path between an instruction cache memory and the instruction queue. In the circular dispatch queue, instructions are never moved from one stage to another. Instead, pointers are maintained that indicate the top and bottom instructions within the circular dispatch queue. This technique removes inputs from the multiplexor between the register stages in the circular dispatch queue and the instruction cache memory, thus reducing the critical delay.
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申请公布号 |
US5754811(A) |
申请公布日期 |
1998.05.19 |
申请号 |
US19960730606 |
申请日期 |
1996.10.08 |
申请人 |
PUTRINO, MICHAEL;MALLICK, SOUMMYA;LOPER, ALBERT JOHN |
发明人 |
PUTRINO, MICHAEL;MALLICK, SOUMMYA;LOPER, ALBERT JOHN |
分类号 |
G06F5/10;G06F9/38;(IPC1-7):G06F9/00 |
主分类号 |
G06F5/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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