| 摘要 |
A BIST circuit built in a LSI device incorporating a LSI memory such as a DRAM, a SRAM, a Flash memory, and the like has a repair code generator/register (7) and a selector (6) or a self repair circuit (8). The repair code generator/register (7) generates a repair code regarding information of a redundancy memory cell to be used instead of a faulty memory cell when a comparator (3) indicates that a memory cell array (51) includes the faulty memory cell. The selector (6) selectively outputs data stored in the GO/NG register (4) and the repair code generator/register (7). The self repair circuit (8) repairs the faulty memory cell based on the repair code.
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