发明名称 Method for forming a FinFET by a damascene process
摘要 A device isolation film and an active region are formed on a semiconductor substrate, using a first mask pattern to expose only a formation region of the device isolation film. Only the device isolation film is selectively etched by using the first mask pattern and a second mask pattern as an etch mask, to form a fin only on a gate formation region, the second mask pattern to expose only a gate electrode formation region. A gate insulation layer is formed on both sidewalls of the fin and a gate electrode covering the first mask pattern and the gate insulation layer is formed. Source and drain regions are formed on the remaining portion of the active region where the gate electrode was not formed. Gate electrode separation becomes adequate and manufacturing costs can be reduced.
申请公布号 US7358142(B2) 申请公布日期 2008.04.15
申请号 US20050046623 申请日期 2005.01.28
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KANG HEE-SOO;LEE CHUL;KIM TAE-YONG;PARK DONG-GUN;AHN YOUNG-JOON;LEE CHOONG-HO;HAN SANG-YEON
分类号 H01L21/336;H01L27/092;H01L21/8228;H01L29/786;H01M8/00 主分类号 H01L21/336
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