发明名称 Bias-temperature induced damage mitigation circuit
摘要 A circuit that regulates electrical current flow through an integrated circuit involves a sequencing circuit connected to a clock signal generator, the sequencing circuit configured to, responsive to receiving a clock signal from the clock signal generator, generate a set of sequencing signals that includes a first switching signal, a second switching signal, and a disable signal. The circuit also involves a switching circuit connected to the sequencing circuit, the switching circuit configured to receive the first switching signal and the second switching signal and a current mirror connected to the switching circuit and the sequencing circuit, the current mirror configured to receive an activation signal from a current control logic circuit and to receive the disable signal.
申请公布号 US9401643(B1) 申请公布日期 2016.07.26
申请号 US201514642797 申请日期 2015.03.10
申请人 International Business Machines Corporation 发明人 Onsongo David M.;Paulsen David P.;Peterson Kirk D.;Sheets, II John E.
分类号 H03K19/09;H02M3/158;G05F3/26;H03K19/094 主分类号 H03K19/09
代理机构 代理人 Dobson Scott S.;Williams Robert
主权项 1. A circuit, comprising: a sequencing circuit connected to a clock signal generator, the sequencing circuit configured to, responsive to receiving a clock signal from the clock signal generator, generate a set of sequencing signals that includes a first switching signal, a second switching signal, and a disable signal, wherein the sequencing circuit includes: a first inverter with a first inverter output, and a first inverter input connected to the clock signal generator;a second inverter with a second inverter output, and a second inverter input connected to the first inverter output; anda first frequency divider having a first divider output, and a first divider input connected to the second inverter output; a switching circuit connected to the sequencing circuit, the switching circuit configured to receive the first switching signal and the second switching signal; and a current mirror connected to the switching circuit and the sequencing circuit, the current mirror configured to receive an activation signal from a current control logic circuit and to receive the disable signal.
地址 Armonk NY US