FREQUENCY-DOMAIN HIGH-SPEED BUS SIGNAL INTEGRITY COMPLIANCE MODEL

摘要

Embodiments of the present disclosure provide methods for using a compliance model to determine compatibility of a channel with a bus's chip I/O circuitry at its ends. The method includes identifying at least one design criteria and obtaining boundary sets of frequency domain parameters for compliant signal channels known to achieve the design criteria. In certain embodiments, the boundary sets may be derived using a genetic algorithm. The method further includes verifying whether a particular signal channel is compliant by comparing values of frequency domain parameters for the particular channel to one or more of the boundary sets of frequency domain parameters for the known compliant channels.

主权项

1. A method for channel compliance testing, comprising:
identifying at least one design criteria; obtaining boundary sets of frequency domain parameters for compliant signal channels known to achieve the design criteria; and verifying whether a particular signal channel is compliant by comparing values of frequency domain parameters for the particular channel to one or more of the boundary sets of frequency domain parameters for the known compliant channels.