发明名称 VIDEO SIGNAL PROCESSOR
摘要 PURPOSE: To suppress flickers at the time of the variable speed reproduction of a digital VTR or the like by changing a coefficient corresponding to the output field order of a video signal converter by a vertical filtering device. CONSTITUTION: A deblocking/deshuffling circuit 16 deblocks and deshuffles the inputted video signals of a frame unit, converts them into the video signals of a field unit and outputs them. At the time, a microcomputer 31 sends control signals VFF and VFS for setting a field order corresponding to the reproduction mode (normal, slow and reverse, etc.,) of the digital VTR to the deblocking/ deshuffling circuit 16. The output of the deblocking/deshuffling circuit 16 is filtered corresponding to the field order by a vertical filter 32 for which the coefficient is changed by the control signals from the microcomputer 31.
申请公布号 JPH08107544(A) 申请公布日期 1996.04.23
申请号 JP19940266315 申请日期 1994.10.05
申请人 SONY CORP 发明人 TAUCHI YOICHIRO
分类号 H04N5/92;G11B20/10;H04N5/783;H04N5/937;H04N9/804;H04N9/877;(IPC1-7):H04N5/937 主分类号 H04N5/92
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