发明名称 |
Reconfigurable dual mode memory in programmable logic devices |
摘要 |
<p>A programmable logic device having content addressable memory is disclosed. In a preferred embodiment, the programmable logic device includes reconfigurable dual mode memory suitable for operating as a content addressable memory in a first mode and a random access memory in a second mode is disclosed. Mode control switch circuitry may be provided to selectively enable a user to configure the dual mode memory as either content addressable memory or random access memory .</p> |
申请公布号 |
EP0883132(A2) |
申请公布日期 |
1998.12.09 |
申请号 |
EP19980303123 |
申请日期 |
1998.04.23 |
申请人 |
ALTERA CORPORATION |
发明人 |
RANGASAYEE, KRISHANA;BEILBY, ROBERT N. |
分类号 |
G11C15/04;G11C11/41;(IPC1-7):G11C16/00 |
主分类号 |
G11C15/04 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|