发明名称 LOGICAL OUTPUT CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To prevent wasteful current flow and to save power. SOLUTION: When a high level signal is applied as a logic signal from a circuit on the preceding stage, a third MOS FET 3 as an output transistor goes into an off-state, while a fifth MOS FET 5 goes into an on-state. Then, a first MOS FET 1 is turned on in a diode connected state, a current flows from a second MOS FET 2 to the MOS FET 3, and an output terminal 15 is in a so-called pull-up state to produce high level signal. On the other hand, when a low level signal is applied as a logic signal from the circuit on the preceding stage, conversely to the case of the high level, the MOS FET 3 goes into an on state, and the MOS FETs 1 and 2 go into on states, a current is not fed to the MOS FET 3, and the terminal 15 goes into a low level output state by the third MOS FET.</p>
申请公布号 JPH11154854(A) 申请公布日期 1999.06.08
申请号 JP19970334807 申请日期 1997.11.20
申请人 NEW JAPAN RADIO CO LTD 发明人 SAKATA DAISUKE
分类号 H01L21/8238;H01L27/092;H03K19/0175;(IPC1-7):H03K19/017;H01L21/823 主分类号 H01L21/8238
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