发明名称 WAFER LEVEL PACKAGE AND METHOD OF FABRICATING THE SAME
摘要 <p>A wafer package and a manufacturing method thereof are provided to minimize reliability reduction of connectivity due to an excessive protrusion of a connection device by forming the connection device penetrating a floor of a trench, after forming the trench according to a scribe line. A plurality of semiconductor chips having a connection pad are formed on a wafer(S10). A trench is formed under the connection pad by patterning a bottom surface of the wafer(S30). A via hole exposing the bottom surface of the connection pad is formed by patterning the bottom surface of the trench(S50). A connection device is formed and connected to the connection pad through the via hole(S60).</p>
申请公布号 KR20070112646(A) 申请公布日期 2007.11.27
申请号 KR20060045802 申请日期 2006.05.22
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHUNG, HYUN SOO;LEE, IN YOUNG;HWANG, SON KWAN;LEE, DONG HO;HWANG, SEONG DEOK
分类号 H01L23/12 主分类号 H01L23/12
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