发明名称 |
Wiring substrate and method of manufacturing the same |
摘要 |
A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole. |
申请公布号 |
US9412687(B2) |
申请公布日期 |
2016.08.09 |
申请号 |
US201514734395 |
申请日期 |
2015.06.09 |
申请人 |
SHINKO ELECTRIC INDUSTRIES CO., LTD. |
发明人 |
Kunimoto Yuji;Furuichi Jun;Shimizu Noriyoshi;Koizumi Naoyuki |
分类号 |
H05K1/11;H01L23/498;H05K3/00;H05K3/46;H05K3/42 |
主分类号 |
H05K1/11 |
代理机构 |
Rankin, Hill & Clark LLP |
代理人 |
Rankin, Hill & Clark LLP |
主权项 |
1. A wiring substrate, comprising:
a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval; a first insulation layer formed on the first wiring layer; a metal plane layer formed on a portion of the first insulation layer, the first wiring part being located below the portion; a second insulation layer formed on the first insulation layer and the metal plane layer; a first via hole extending from an upper surface of the second insulation layer to the first wiring layer; a first via conductor formed in the first via hole; a second via hole formed in the second insulation layer and reaching the metal plane layer; a second via conductor formed in the second via hole; a second wiring layer formed on the second insulation layer and connected to the first wiring layer via the first via conductor; a third wiring layer formed on the second insulation layer and connected to the metal plane layer via the second via conductor; a first multi-layered wiring layer; and a second multi-layered wiring layer formed on the first multi-layered wiring layer and having a wiring pitch narrower than the first multi-layered wiring layer, and wherein the second multi-layered wiring layer comprises the first wiring layer, the metal plane layer, the second wiring layer and the third wiring layer. |
地址 |
Nagano-Shi JP |