发明名称 Method for forming package-on-package structure
摘要 A method comprises attaching a semiconductor die on a first side of a wafer, attaching a first top package on the first side of the wafer and attaching a second top package on the first side of the wafer. The method further comprises depositing an encapsulation layer over the first side of the wafer, wherein the first top package and the second top package are embedded in the encapsulation layer, applying a thinning process to a second side of the wafer, sawing the wafer into a plurality of chip packages and attaching the chip package to a substrate.
申请公布号 US9412661(B2) 申请公布日期 2016.08.09
申请号 US201213683502 申请日期 2012.11.21
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Lu Chun-Lin;Liu Ming-Kai;Wu Kai-Chiang;Yang Ching-Feng
分类号 H01L23/48;H01L21/768;H01L21/56;H01L23/00;H01L25/03;H01L25/00;H01L23/538;H01L21/683;H01L23/31;H01L23/498 主分类号 H01L23/48
代理机构 Slater Matsil, LLP 代理人 Slater Matsil, LLP
主权项 1. A method comprising: attaching a semiconductor die on a first side of a wafer comprising a plurality of embedded vias; attaching a first top package on the first side of the wafer, wherein the semiconductor die has a leftmost edge and a rightmost edge, and wherein both the leftmost edge and the rightmost edge are located within a range from a left edge of the first top package to a right edge of the first top package, and wherein the first top package is connected to the first side of the wafer through at least one bump and a bottom surface of the at least one bump is in direct contact with a first redistribution layer on the first side of the wafer; attaching a second top package on the first side of the wafer; depositing an encapsulation layer over the first side of the wafer, wherein the first top package and the second top package are embedded in the encapsulation layer; applying a thinning process to a second side of the wafer until embedded ends of the embedded vias are exposed, wherein after the step of applying the thinning process, a thickness of the wafer is less than 20 um; after the step of applying the thinning process to the second side of the wafer, forming a redistribution line over the second side of the wafer, wherein the redistribution line is in direct contact with a via of the wafer, and edges of the redistribution line extend beyond corresponding edges of the via; attaching a dicing tape on the second side of the wafer, wherein the redistribution line is in direct contact with the dicing tape; applying a sawing process to the wafer until a portion of the dicing tape has been removed during the sawing process, wherein after the step of applying the sawing process to the wafer, the wafer is divided into a plurality of chip packages; and attaching one of the plurality of chip packages to a substrate.
地址 Hsin-Chu TW