发明名称 Process of semiconductor fabrication with mask overlay on pitch multiplied features and associated structures
摘要 Spacers are formed by pitch multiplication and a layer of negative photoresist is deposited on and over the spacers to form additional mask features. The deposited negative photoresist layer is patterned, thereby removing photoresist from between the spacers in some areas. During patterning, it is not necessary to direct light to the areas where negative photoresist removal is desired, and the clean removal of the negative photoresist from between the spacers is facilitated. The pattern defined by the spacers and the patterned negative photoresist is transferred to one or more underlying masking layers before being transferred to a substrate.
申请公布号 US9412591(B2) 申请公布日期 2016.08.09
申请号 US201314056367 申请日期 2013.10.17
申请人 Micron Technology, Inc. 发明人 Tran Luan C.
分类号 G03F7/20;H01L21/027;H01L21/033 主分类号 G03F7/20
代理机构 Wells St. John P.S. 代理人 Wells St. John P.S.
主权项 1. A method for semiconductor processing, comprising: forming spacers over a substrate, the spacers spaced apart by about 50 nm or less; depositing negative photoresist between and above the spacers and over the substrate; and patterning the negative photoresist using a photolithographic technique to selectively remove at least some of the negative photoresist from between at least some sections of the spacers, wherein the spacers have a pitch below a minimum pitch resolution of the photolithographic technique.
地址 Boise ID US