| 主权项 |
1. A device for generating a performance evaluation program comprising:
a memory; and a processor coupled to the memory and configured to:
analyze a source code of a target program that is subject to performance evaluation,detect, from among a plurality of areas included in the source code, a plurality of evaluation areas corresponding to a plurality of candidates of a target location where a performance evaluation of the target program is executed, based on an analysis result of the source code, the plurality of candidates including one or more loop processings,secure the plurality of evaluation areas by writing a no-operation (NOP) instruction to each of the plurality of evaluation areas detected from the plurality of areas, the NOP instruction indicating an instruction to proceed to an execution of a next instruction without any execution,generate an execution binary by translating the source code including the written NOP instruction into a binary code,generate a location information file indicating a correspondence relationship between an address and an insertion location for each of the plurality of secured evaluation areas, andreplace the NOP operation stored in an evaluation area corresponding to the target location among the plurality of secured evaluation areas included in the execution binary with an evaluation code based on an evaluation item and the target location of the target program, according to the location information file, wherein the location information file includes a condition under which a loop processing is executed, for each of one or more evaluation areas related to the loop processing among the plurality of secured evaluation areas, the condition being a type of the loop processing which is based on a number of times of the loop processing. |
