| 摘要 |
Connection arrangement for CMOS circuit input protection in level translators in devices with negative logical levels is designed in the following way: Germanium diode or Shotky diode, whose anode is connected with supply bus is connected by means of a cathode to the CMOS circuit input. The opened diode has voltage drop of -0.2 V, which should guarantee that the permitted negative voltage of -0.3 V on the CMOS circuit input will not be exceeded. In traditional connection arrangements this condition was not always guaranteed, because the voltage drop on the protection diode is not constant, i.e. - 0.2 V, but is dependant on the current flow. Its strength can be reduced by an input resistor (3) but the resistor is used in the function of potential divider, therefore its value can not be changed arbitrarily. In measured objects (1), where there are transition phenomena with high levels arising as a result of their activity, it is not possible to design the input resistor (3) optimally, while when using the above mentioned diode types even at current value of approximately 1 mA the voltage drop on the first diode (4) higher than - 0.3 V arises, which can result in damaging the CMOS circuit (7). The above mentioned disadvantages are removed thanks to this connection arrangement, whose principle consists in the fact that a third diode (17), whose anode is connected with the CMOS circuit (7) input (10), is connected to the cathode of the first diode (4) by means of its cathode.<IMAGE>
|
