Reduced-overhead error detection and correction

摘要

A memory controller is operable in an error detection/correction mode in which N syndrome values apply to N data words of a data volume, respectively, but a single parity bit is shared across all N data words of the data volume.

主权项

1. A method of operation within a memory control component, the method comprising:
generating, for each one of a plurality of data values within a data block, a respective syndrome value that indicates a bit position of a bit error, if any, within the one of the data values; generating a block parity bit based, at least in part, on constituent bits within each of the plurality of data values within the data block; and correcting a bit error detected within any one of the data values based in part on the state of the block parity bit.