发明名称 OPTIMIZATION OF MEMORY ACCESSES IN A CIRCUIT DESIGN
摘要 Methods and apparatus for optimizing memory accesses in a circuit design are described. According to one embodiment, a method comprises identifying a subset of variables from a multi-variable memory space that are accessed by a plurality of loops (204), storing the subset of variables in a separately accessible memory space (106), and accessing one of the stored subset of variables to recover a stored value of the one of the stored subset of variables for use by at least one of the plurality of loops during synthesis (308). According to another embodiment, a method comprises identifying at least a first loop and a second loop (304), determining whether a dependency exists between the first loop and the second loop (306), and merging the first loop and the second loop into a single merged loop (308), wherein the merging comprises mapping a plurality of memory accesses from the first loop to a sliding window (308).
申请公布号 WO2006135816(A3) 申请公布日期 2009.04.23
申请号 WO2006US22636 申请日期 2006.06.09
申请人 发明人 GUTBERLET, PETER, PIUS;FINGEROFF, MICHAEL, F.;GUYLER, IAN, ANDREW;TAKACH, ANDRES, R.;MCCLOUD, SHAWN;BOWYER, BRYAN, DARRELL
分类号 G06F12/00;G06F9/45;G06F17/50 主分类号 G06F12/00
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