发明名称 PHASE LOCKED LOOP HAVING STACK STRUCTURE FOR LOW POWER
摘要 A phase locked loop having a stack structure for low power is provided to remove a power noise caused by a parasitic inductance generated in current mirroring by not using a current mirror circuit. A phase locked loop having a stack structure for low power includes a voltage controlled oscillator(120), and a divider(110). The voltage controlled oscillator is located on a ground terminal and an operation power terminal for supplying a predetermined operation power, and generates an oscillation signal. The divider is electrically coupled to the voltage controlled oscillator in series between the operation power terminal and the ground terminal. The divider generates a division signal which divides an oscillation signal of the voltage controlled oscillator. The voltage controlled oscillator and the divider form a transmission path of the operation current which flows between the operation power terminal and the ground terminal.
申请公布号 KR20080082826(A) 申请公布日期 2008.09.12
申请号 KR20070023627 申请日期 2007.03.09
申请人 SAMSUNG ELECTRO-MECHANICS CO., LTD. 发明人 KIM, MYEUNG SU;CHO, SEONG HWAN;PARK, DONG MIN;PARK, TAH JOON;KWON, YONG IL;LIM, JOON HYUNG
分类号 H03L7/08 主分类号 H03L7/08
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