发明名称 DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD
摘要 PROBLEM TO BE SOLVED: To efficiently use a buffer memory.SOLUTION: A data processing apparatus 20 includes: a buffer memory 12; a first processing section 11 which operates with a first operation frequency, has an m-bit data bus width, and writes data to the buffer memory 12; a second processing section 13 which operates with a second operation frequency lower than the first operation frequency, has an n-bit data bus width, and reads data from the buffer memory 12; and a management section 14 which manages data to be stored in the buffer memory 12. The buffer memory 12 stores the data received by the first processing section 11, in response to a request from the second processing section 13. The management section 14 manages the data to be stored in the buffer memory 12, on the basis of an identifier to be applied by m bits with respect to the data. The second processing section 13 rearranges the data read from the buffer memory 12, on the basis of the identifier, to generate n-bit data.SELECTED DRAWING: Figure 7
申请公布号 JP2016170607(A) 申请公布日期 2016.09.23
申请号 JP20150049691 申请日期 2015.03.12
申请人 NEC CORP 发明人 FUKAGAWA MASAO
分类号 G06F12/00;G06F13/38 主分类号 G06F12/00
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