发明名称 Semiconductor integrated circuit capable of preventing occurrence of erroneous operation due to noise.
摘要 <p>A semiconductor integrated circuit includes a circuit block (13) whose operation is controlled by a inverted control signal whose significant potential level is set at a ground potential, and a wiring (12) for transmitting a control signal for controlling the operation of the circuit block (13). An inverting circuit (14) provided near the circuit block inverts the control signal and then supplies the inverted signal to the circuit block (13) via a wiring (15). The inverter includes a first capacitor (25) connected between the power source terminal and a node (23) which is set at a high potential level in the inverter circuit (14) when the control signal is set at the non-significant potential level and a second capacitor (30) connected between a ground potential terminal and a node (28) which is set at a ground potential level when the control signal is set at the non-significant potential level.</p>
申请公布号 EP0377841(A2) 申请公布日期 1990.07.18
申请号 EP19890122917 申请日期 1989.12.12
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 OHTSUKA, NOBUAKI INTELL. PROPERTY DIV.;TANAKA, SUMIO INTELL. PROPERTY DIV.
分类号 H01L21/8247;G11C16/02;G11C16/12;G11C16/22;G11C17/00;H01L21/822;H01L27/04;H01L27/10;H01L29/788;H01L29/792 主分类号 H01L21/8247
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