| 摘要 |
PURPOSE:To reduce the circuit scale without need of provision of N-sets of divider circuits by differentiating the bit inverting position implemented for preventing mis-synchronization at a receiver side entirely from each of N-sets of words being components of an interleaved frame. CONSTITUTION:A coding circuit 1 applies error correction coding to an input signal, an inverting circuit 2 inverts bits at an optional position of the signal by using a timing signal from an interleave circuit 3, which outputs the resulting signal to a radio channel. When no error is in existence on a transmission line and the position of bits inverted by the circuit 2 is entirely the same, since a syndrome pattern produced by a conversion circuit 4 converting the signal into N-series of signals and by a divider circuit 5 through a generation polynomial is the same, no delimiter of frames cannot be detected. However, syndrome patterns from the circuit 5 are all different from each other by differentiating entirely bit positions of inversion at the circuit 2 from each of N-sets of words being components of frames. The correction is implemented correctly and a timing signal being a reference signal of de-interleaving by realizing the N-sets of the correction methods as above by correction circuits 6-1-6-N. |
