| 摘要 |
A circuit for generating a precharge signal of a semiconductor memory device is provided to prevent difference between TRP and TWR during normal precharge and auto precharge by outputting a normal precharge signal and an auto precharge signal synchronized with a clock. A timing control unit(100) generates a timing signal by a normal precharge command or an auto precharge command. A precharge signal generation unit(200) outputs the timing signal as a precharge signal by synchronizing the timing signal with a clock. The timing control unit generates the timing signal when the normal precharge command is inputted or generates the timing signal after delay time corresponding to burst length and CAS latency when the auto precharge command is inputted. The timing control unit includes a first signal generation part, a second signal generation part and a signal assembly part. The first signal generation part outputs the enabled timing signal when both of a row address strobe signal and a write enable signal are enabled. The second signal generation part determines the output timing of the enabled timing signal in response to the timing control signal if an address signal is enabled. The signal assembly part outputs the timing signal by assembling output signals of the first and the second signal generation part. |
